The present invention concerns chip architecture and particularly a dual purpose secure chip architecture with a protected internal operating system.
For some processing applications, it is essential to operate in a secure environment so that operations cannot be probed or altered. In the prior art, various methods have been used to pro, de for a secure processing environment.
For example, a mechanical chassis can be used to house processing equipment. This mechanical chassis can include tamper switches and other elements to detect and protect against tampering and alterations. Unfortunately, such a mechanical chassis can add a significant amount of expense to a product.
Alternately, in order to restrict access to particular integrated circuits, the integrated circuits can be covered with epoxy or other chemical materials to hinder access. Unfortunately, often this can be easily defeated and so provides only a nominal amount of protection.
Another method to pro,de for a secure processing environment is to implement the system on a single integrated circuit. However, if a secure operating system is not implemented, these systems also, generally, can be defeated. However, implementation of a completely secure operating system for all functions significantly limits the functionality of the system.